Key points
- The CMP 170HX uses the same GA100 silicon as the A100 and has roughly 80 GB of HBM, although only 8 GB is normally exposed.
- The researcher used an STM32-based glitcher to replace the PWMVID signal and a three-pulse sequence to enable e-fuse writes.
- Programming the fuses alone was insufficient; the project also required a driver configuration patch and, for PCIe Gen4 and NVLink, board-level changes.
- The source says modifying the relevant fuses on serial production cards is forbidden.
Context
This is primarily a hardware reverse-engineering project rather than a ready-made upgrade for production systems. It demonstrates that usable accelerator capacity can depend on several interacting layers, including e-fuses, drivers, board design, and firmware checks.
What this means for you
Directly applicable
For developers, the case shows how silicon-level configuration, driver patches, and board-level changes can jointly determine usable accelerator memory.
Who benefits: Developers working on accelerator support or low-level driver and board integration can benefit from the documented sequence of required changes.
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